Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TMS370Cx4x
8-BIT MICROCONTROLLER
SPNS016C – NOVEMBER 1992 – REVISED FEBRUARY 1997
1
POST OFFICE BOX 1443
•
HOUSTON, TEXAS 77251–1443
D
CMOS/EEPROM/EPROM Technologies on a
Single Device
– Mask-ROM Devices for High Volume
Production
– One-Time-Programmable (OTP) Devices
for Low-Volume Production
– Reprogrammable EPROM Devices for
Prototyping Purposes
D
Flexible Operating Features
– Low-Power Modes: STANDBY and HALT
– Commercial, Industrial, and Automotive
Temperature Ranges
– Clock Options:
– Divide-by-1 (2 MHz–5 MHz SYSCLK)
Phase-Locked Loop (PLL)
– Divide-by-4 (0.5 MHz–5 MHz SYSCLK)
– Voltage (V
CC
) 5 V
±
10%
D
Internal System Memory Configurations
– On-Chip Program Memory Versions
– ROM: 4K Bytes or 8K Bytes
– EPROM: 8K Bytes
– Data EEPROM: 256 Bytes
– Static RAM: 256 Bytes Usable as
Registers
D
Two 16-Bit General-Purpose Timers
– Software Configurable as
Two 16-Bit Event Counters, or
Two 16-Bit Pulse Accumulators, or
Three 16-Bit Input Capture Functions, or
Four Compare Registers, or
Two Self-Contained
Pulse-Width-Modulation (PWM)
Functions
D
Serial Communications Interface 1 (SCI1)
– Asynchronous and Isosynchronous
†
Modes
– Full Duplex, Double Buffered RX and TX
– Two Multiprocessor Communications
Formats
D
CMOS/Package/TTL Compatible I/O Pins
– All Peripheral Function Pins Software
Configurable for Digital I/O
– 40-Pin Plastic and Ceramic Dual-In-Line
Packages/27 Bidirectional, 5 Input Pins
– 44-Pin Plastic and Ceramic Leaded Chip
Carrier Packages/27 Bidirectional, 9
Input Pins
D
On-Chip 24-Bit Watchdog Timer
D
Eight-Bit ADC1
– Four Channels in 40-Pin Packages
– Eight Channels in 44-Pin Packages
D
Flexible Interrupt Handling
D
TMS370 Series Compatibility
D
Workstation/PC-Based Development
System
– C Compiler Support
– Real-Time In-Circuit Emulation
– C Source Debug
– Extensive Breakpoint/Trace Capability
– Software Performance Analysis
– Multi-Window User Interface
– EEPROM/EPROM Programming
JC, JD, N, AND NJ PACKAGES
(
TOP VIEW
)
FN AND FZ PACKAGES
(
TOP VIEW
)
B2
T2AEVT
T2AIC2/PWM
T2AIC1/CR
RESET
INT1
INT2
INT3
V
CC
A7
A6
V
SS
A5
A4
A3
A2
A1
A0
D7
D4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
B1
B0
SCITXD
SCIRXD
SCICLK
D5
MC
XTAL2/CLKIN
XTAL1
T1IC/CR
T1PWM
T1EVT
AN7
AN6
V
CC3
V
SS3
AN3
AN2
D6
D3
MC
XTAL2/CLKIN
XTAL1
T1IC/CR
T1PWM
T1EVT
AN7
AN6
AN5
AN4
V
SS3
39
38
37
36
35
34
33
32
31
30
29
18
19
7
8
9
10
11
12
13
14
15
16
17
INT1
INT2
INT3
V
CC
V
CC3
A7
A6
V
SS
A5
A4
A3
20
21
22
23
S
C
I
T
X
D
S
C
I
R
X
D
S
C
I
C
L
K
D
5
5
4
3
2
1
6
44
R
E
S
E
T
T
2
A
I
C
1
/
C
R
T
2
A
I
C
2
/
P
W
M
T
2
A
E
V
T
B
2
B
1
B
0
A
N
0
A
N
1
A
N
2
A
2
A
1
A
0
D
7
D
4
D
6
42
41
40
43
24
25
26
27
28
A
N
3
D
3
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
©
1997, Texas Instruments Incorporated
†
Isosynchronous = Isochronous