TMS370Cx5x
8-BIT MICROCONTROLLER
SPNS010F – DECEMBER 1986 – REVISED FEBRUARY 1997
functional block diagram
E0 – E7
or
AN0 – AN7
INT1
INT2
INT3 XTAL1 XTAL2/
CLKIN
MC
RESET
Interrupts
Clock Options:
System Control
Divide-by-4 or
Divide-by-1(PLL)
Analog-to-Digital
Converter 1
VCC3
VSS3
CPU
Program Memory
ROM: 4K, 8K, 12K, 16K,
32K, or 48K Bytes
EPROM: 16K, 32K, or
48K Bytes
RAM
256, 512, 1K, 1.5K, or
3.5K Bytes
Data EEPROM
0, 256, or 512 Bytes
Serial
Peripheral
Interface
Serial
Communications
Interface 1
Timer 2A
SPISOMI
SPISIMO
SPICLK
SCIRXD
SCITXD
SCICLK
T2AIC1 / CR
T2AEVT
T2AIC2 / PWM
T1IC / CR
T1EVT
T1PWM
Timer 1
Memory Expansion
Address MSbyte
Address LSbyte
Watchdog
Control
Port D†
8/6
VSS2
† For the 64-pin devices, there are only six pins for port D.
VCC2
Port A
8
Data
Port B
8
Port C
8
VCC1
VSS1
description
The TMS370Cx5x family of single-chip 8-bit microcontrollers provides cost-effective real-time system control
through integration of advanced peripheral function modules and various on-chip memory configurations. The
TMS370Cx5x family presently consists of twenty-one devices which are grouped into seven main sub-families:
the TMS370Cx50, TMS370Cx52, TMS370Cx53, TMS370Cx56, TMS370Cx58, TMS370Cx59, and
SE370C75x.
The TMS370Cx5x family of devices is implemented using high-performance silicon-gate CMOS EPROM and
EEPROM technologies. The low-operating power, wide-operating temperature range, and noise immunity of
CMOS technology, coupled with the high performance and extensive on-chip peripheral functions, make the
TMS370Cx5x devices attractive in system designs for automotive electronics, industrial motor control,
computer peripheral control, telecommunications, and consumer application. Table 2 provides a memory
configuration overview of the TMS370Cx5x devices.
4
POST OFFICE BOX 1443
•
HOUSTON, TEXAS 77251–1443
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