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LPAE Access

k.s shin
Expert 2115 points
Other Parts Discussed in Thread: 66AK2H12

Hi.

I have some questions.

1. Could you tell me how to access LPAE region in K2hk EVM using CCS.
Memory browser in CCS can't shows/writes Extension Memory region.

2. to read to to write in the LPAE region, I use '/dev/mem' file in the linux.
I open '/dev/mem' used open function and remap in userspace used mmap fucntion. but mmap function return value is 32 bit pointer type. I think least 40 bit Address requred to control LPAE region. How to access LPAE region physical address in userspace on the linux? I use mmap64 function already but the function not found in gcc-arm-linux.

Regards

Shin.

  • 0
    TI__Guru** 116100 points
    I don't have handson this 40bit address access on K2H/K2E platforms.
    Yet to start.

    If need to access 40bit in Linux, you should enable the LPAE option in u-boot.

    In CCS, you should configure the MPAX settings in code to access 40bit.
  • 0 in reply to Titusrathinaraj Stalin
    Expert 2115 points
    thanks for your reply

    Sorry about my question , LPAE Address is 36 bit, NOT 40 bit.

    I set LPAE option in u-boot already,
    I want to get a physical address LPAE region, more then 32 bit address, but linux pointer is only 32 bit because Keystone2 is 32bit machine.
    I want to know how to convert 36 bit Address to 32bit address.

    and how to set MPAX set in CCS?

    regards.
    Shin.
  • 0 in reply to k.s shin
    TI__Guru 50170 points

    Shin,

    You can't in Linux because Linux is only working on 32-bit addressing and with virtual memory only. devmem2 allows you to access memory at its physical address but still limited to 32-bit address space.

    Rex

  • 0 in reply to Rex Chang
    Expert 2115 points
    Thanks for reply

    I have to use CCS only. but I can't find setting of MPAX in keystone2 Manual. Where could I find MPAX in Keystone2?

    Regards
    Shin.
  • 0 in reply to k.s shin
    TI__Genius 12805 points

    Shin

    when we say MPAX registers, we actually mean two things -

    When a DSP core access external (to the Corepac) it goes through a set of 16 MPAX registers. These registers are described in the CorePac document (http://www.ti.com/lit/ug/sprugw0c/sprugw0c.pdf ) chapter 7.3 and they can be access ONLY from the CorePac. You can see then in CCS memory browser.   The local address of the MPAX registers in dsp core starts at address 0x0800 0004 see 7.3.1.2 of the User Guide.

    Accessing the MSMC memory or the DDR from the TeraNet, that is, any EDMA or any other host in the device except the ARM goes through a different set of MPAX registers. They described in the MSMC user guide ( http://www.ti.com/lit/ug/sprugw7a/sprugw7a.pdf ) in chapter 2.2.  Each host ID has a set of 8 MPAX registers to access the external DDR, called SES and 8 MPAX registers to access MSMC memory, called SMS.  These registers have global address. To find the global address look at table 3-1 in the MSMC user guide (close to the end of the table) for the offset of the registers,  and then look at the base address of the MSMC control register in the device User Guide memory map. For example, 66AK2H12 User Guide (http://www.ti.com/lit/ds/symlink/66ak2h12.pdf ) table 6-1 memory map shows that the base address of the MSMC configuration register is 0x0bc0 0000

    I think that I answered your question.  If so, close the thread

    Ran